By Peng Li, Department of Electrical and Computer Engineering, Texas A&M University, College Station, USA, pli@tamu.edu
Transistor-level circuit simulation is a fundamental computer-aided design technique that enables the design and verification of an extremely broad range of integrated circuits. With the proliferation of modern parallel processor architectures, leveraging parallel computing becomes a necessity and also an important avenue for facilitating large-scale circuit simulation. This monograph presents an in-depth discussion on parallel transistor-level circuit simulation algorithms and their implementation strategies on a variety of hardware platforms. While providing a rather complete perspective on historical and recent research developments, this monograph highlights key challenges and opportunities in developing efficient parallel simulation paradigms.
The ability to predict circuit performance through simulation is at the core of any design process; it makes the implementation of complex integrated circuits technically feasible and economically viable while relaxing any heavy need for prototyping. Transistor-level circuit simulation is a fundamental computer-aided design technique that enables the design and verification of an extremely broad range of integrated circuits. With the proliferation of modern parallel processor architectures, leveraging parallel computing becomes a necessity and also an important avenue for facilitating large-scale circuit simulation. Parallel Circuit Simulation: A Historical Perspective and Recent Developments presents an in-depth discussion on parallel transistor-level circuit simulation algorithms and their implementation strategies on a variety of hardware platforms. While providing a rather complete perspective on historical and recent research developments, it also highlights key challenges and opportunities in developing efficient parallel simulation paradigms.